Speaker
Michail Sapkas
(UniPD - INFN Padova)
Description
This poster presents the design and implementation of a Gated Recurrent Unit (GRU) on Xilinx Versal AI Engines. We outline the mapping of GRU computations to the AI Engine architecture, discuss dataflow and parallelization strategies, and highlight performance considerations for efficient recurrent neural network inference. The design supports unquantized models by leveraging 32-bit floating-point datatypes on the AI Engines.
| Student | Yes |
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Primary author
Michail Sapkas
(UniPD - INFN Padova)
